Reduce the Chances of Human Error: Part 2, Super Amps and Filters for Analog Interface
IntroductionAs children we learned to share and in that process we learned about portions. Many parents taught this to children by having one child cut the pie or cake and then letting another child pick the piece first. We can be sure that great care was used to make the pieces all the same size.
We are reminded of a good lesson in life, "It's the ratio that counts." We use ratios in everyday life when we compare distances between different routes or the taste of two foods. (Yes, mom's cooking was better, or maybe we were too young to know any difference?).
Moving from children, pies, and cakes to analog engineering design, we realize that ratios—the relative amount, proportion, percentage, share, part, and fraction—are all important measurements in analog design. When we ignore these ratios and relationships, we introduce human error into what must be a precise process. This application note shares some analog concepts about amplifiers and filters that will help reduce the chances of "human" error and improve the analog design.
Considerations for Signal to Noise (SNR)Crosstalk and signal to noise (SNR) are expressed as ratios, a proportion of good to bad. How does one improve the SNR of a signal? If a particular circuit contributes considerable noise, we have two basic options: first, reduce the noise somehow, or second, increase the amplitude of the good signal before it goes through the stage. Figure 1 illustrates the concept.
Figure 1. Power-supply noise is added to the signal.
In application note 4992, "Reduce the Chances of Human Error: Part 1, Power and Ground," we concentrated on power noise, ground, and layout. In this companion article we examine how to control noise in the signal path. We discuss the characteristics of the signal and noise as we proceed through the various circuit stages.
Is the major noise source harmonics of a switching power supply? If the power-supply noise is 50kHz and higher and if our wanted signal is 1kHz, then filtering may be feasible. If we will be going into an ADC next, the anti-aliasing filter may help.
Reducing NoiseWhat possibilities does an experienced circuit designer evaluate? The simplest fix is to amplify the signal before the noise is added. Yes, straightforward enough, but unfortunately this solution most often cannot be used because the incoming signal already has noise present. So now we get creative and consider how to separate the signal from noise? Can we use highpass, lowpass, or bandpass filters? Can we discriminate on the basis of amplitude, limiting, noise blanking, or coring? Can we use preemphasis before the noise is introduced and deemphasis after to increase SNR? Can we discriminate on the basis of time, i.e., sample at a minimum noise level or interference time? Can we time average, or if the signal is repetitive, can we sum cycles or average in two, three, or more dimensions?
Turning from component functions, think about the system as a whole. What are the system goals? How will the system be used? How will the human senses interact with the information provided by the system? In short, consider all the information that we can muster.
The above set of questions reflects considerable design experience and knowledge. This is precisely why smart companies hire experienced engineers and mentor the new engineers to build a solid design team.
We can use an example to illustrate the thinking and development process. The first observation finds that the system has a high-gain operational amplifier at its input. The op amp feeds an analog-to-digital converter (ADC). Occasionally a large noise pulse appears on the signal and this causes the op amp to saturate. The op amp recovery time might be as long as milliseconds or seconds. How will we approach the issue? Since every case will be different, we will just ask questions and point out possible solutions.
First, gather data to try to understand what is happening. Can we fix the source? No. So we decide that the noise spike is unavoidable. What do we know about its risetime amplitude and duration? If the spike is very fast and narrow and our wanted signal is relatively slow, can we separate them by filtering? Can we detect the spike and open a series switch to blank out the spike from the main path? Could we add a pair of diodes like an electrostatic discharge (ESD) structure to clip any signal that goes above VCC or below ground? Can we learn from application note 4344, "Rail Splitter, from Abraham Lincoln to Virtual Ground?" In Figure 2 of that application note we create a voltage between VCC and ground at the average signal level of the wanted signal. If the series resistor was replaced with a pair of back-to-back diodes (Figure 2), the signal spike would be limited to the voltage ±0.6V for silicon diodes (red dashed lines) and ~±0.3V for Schottky diodes (green dashed lines). The reverse recovery time for silicon diodes can be between one hundreds and several hundreds of nanoseconds. Schottky diodes have a switching time of ~100ps for the small signal diodes but, because of their operating physics, do not have a reverse recovery time. The diodes can also be placed in the op amp feedback loop to reduce gain during the spike. Figure 3 shows the effect of limiting.
Figure 2. Replacing a series resistor with a pair of back-to-back diodes.
Figure 3. Diode limiter effect, ±0.3V Schottky, ±0.6V silicon.
Figure 3 may help relieve op amp saturation and recovery time, but is it enough? We could add circuits to blank out the noise pulse as in Figure 4.
Figure 4. Noise pulse blanking.
The block diagram of the blanking circuit is Figure 5.
Figure 5. Noise-blanking block diagram.
From the basic concept of blanking in Figure 5, more elegance can be added. The input buffer may not be needed if the source is low impedance. R1 and R2 set a DC value as shown in application note 4344, "Rail Splitter, from Abraham Lincoln to Virtual Ground," mentioned above. Alternatively, the input signal could be AC coupled to this same voltage or the input signal could be averaged over the long term to produce this voltage. The main signal path is from the input buffer through a RC delay, the mux, buffer, and lowpass filter to the ADC. The MAX11203 ADC has four general-purpose input or output (GPIO) ports controlled by the SPI interface. The GPIO is set so that the AIN1of the MAX313 multiplexor is on and AIN2 is off. We highpass or differentiate the noise pulse. The dual or window comparator output will be active while the noise pulse exceeds 0.3V in either the positive or negative direction. The XOR gated inverts the logic to the mux, thereby turning off the main path and switching on the DC voltage. The RC delay also delays the main path long enough for the comparator path to change state. If the RC delay degrades the signal bandwidth too much, an LC delay line can be substituted.
The input buffer of Figure 5 could use a MAX4209 instrument amplifier which has incredibly low offset drift despite its high gain. Application note 4179, "Autozero Noise Filtering Improves Instrumentation Amplifier Output," explains why.
The filter just before the ADC in Figure 5 can control signal bandwidth to meet Nyquist anti-aliasing, reduce noise, or soften the residual blanking glitch. The following application notes will provide advice and ideas:
- 3077, "A Digitally Controllable Lowpass Filter Using a Digital Potentiometer"
- 928, "Filter Basics: Anti-Aliasing"
- 3716, "Folded-Frequency Calculator"
- 3494, "The Basics of Anti-Aliasing: Using Switched-Capacitor Filters"
- 733, "A Filter Primer"
- 1795, "Analog Filter Design Demystified"
- 724, "Generating Switched-Capacitor-Filter Clocks"
Calibration ideas using digital-to-analog converters (DACs) and potentiometers are covered in application notes 4494, "Methods for Calibrating Gain Error in Data-Converter Systems," and 818, "Digital Adjustment of DC-DC Converter Output Voltage in Portable Applications." The digital-output voltage-adjustment methods are performed with DAC, a trim pot (digital potentiometer), and PWM output of a microprocessor. Application note 4704, "Introduction to Electronic Calibration and Methods for Correcting Manufacturing Tolerances in Industrial Equipment Designs," includes a discussion of the DS4303 infinite sample-and-hold to capture a DC Voltage. Other application notes about digital pots include:
- 4101, "Differentiating Digital Potentiometer Features"
- 593, "Dallas Semiconductor Digital Potentiometers: Frequently Asked Questions"
- 4025, "DACs vs. Digital Potentiometers: Which Is Right for My Application?"
- Sensor signal conditioners
- 651, "ESD Protection for I/O Ports"
- 1167, "Practical Aspects of EMI Protection"
- 3950, "A Measurement Technique for Determining RF Immunity"
- RS-232, RS-485, smartcard interface, USB, LVDS
- 2023, "LVDS Serializer-Deserializer Performance over Twisted Pair Cable"
Microprocessor-controlled system clocks typically are of two types: system clocks controlling computing functions in orderly ways, and real time clocks (RTCs) or clocks that relate to human time concepts. Computer clocks operate like soldiers marching in cadence. This can result in interference products that may not meet regulatory requirements. Clock-generator spread-spectrum techniques to reduce this interference are discussed in these notes: 2863, "The Effects of Adjusting the DS1086L's Dither Span and Dither Frequency on EMC Measurements," and 3512, "Automotive Applications for Silicon Spread-Spectrum Oscillators." RTC ideas are found at www.stg-maximintegrated.com/appnotes10.cfm/ac_pk/21.