Improved Power-Supply Rejection for Linear Regulators

Abstract: In portable communications, low-dropout linear regulators (LDOs) generate supply voltages for the RF circuitry; these voltages must be especially clean when powering the synthesizer and voltage-controlled oscillator (VCO). The supply that powers the regulator often includes wideband AC ripple superimposed on the DC. The LDO is expected to reject these artifacts. This article presents three methods for improving the power supply rejection ratio (PSRR) for LDOs.