MAX32667
Low-Power ARM Cortex-M4 with FPU-Based Microcontroller with Bluetooth 5 for Wearables
Generation UB MCUs are Built to Run Complex Applications Demanded by Battery-Powered and Wirelessly Connected Devices
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Key Features
Applications/Uses
Simplified Block Diagram
Technical Docs
| Data Sheet | Low-Power ARM Cortex-M4 with FPU-Based Microcontroller with Bluetooth 5 for Wearables | Apr 23, 2020 |
Fundamentals of Error Correction CodesSupport & Training
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Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact [email protected] with any questions regarding this Sample Site.
Key Features
- High-Efficiency Microcontroller and Audio DSP for Wearable and Hearable Devices
- Arm Cortex-M4 with FPU Up to 96MHz
- Optional Second Arm Cortex-M4 with FPU Optimized for Data Processing
- Low-Power 7.3728MHz System Clock Option
- 1MB Flash, Organized into Dual Banks 2 x 512KB
- 560KB (448KB ECC) SRAM; 3 x 16KB Cache
- Optional Error Correction Code (ECC-SEC-DED) for Cache, SRAM, and Internal Flash
- Bluetooth 5 Low Energy Radio
- 1Mbps and 2Mbps Data Throughput
- Long Range (125kbps and 500kbps)
- Advertising Extension
- Rx Sensitivity: -95dbm; Tx Power Up to +4.5dbm
- On-Chip Matching with Single-Ended Antenna Port
- Power Management Maximizes Operating Time for Battery Applications
- Integrated SIMO SMPS for Coin-Cell Operation
- Dynamic Voltage Scaling Minimizes Active Core Power Consumption
- 27.3µA/MHz at 3.3V Executing from Cache
- Selectable SRAM Retention in Low Power Modes with RTC Enabled
- Multiple Peripherals for System Control
- Three QSPI Master/Slave with Three Chip Selects Each, Three 4-Wire UARTs, Three I2C Master/Slave, Up to 50 GPIOs
- QSPI (SPIXF) with Real-Time Flash Decryption
- QSPI (SPIXR) RAM Interface Provides SRAM Expansion
- 8-Input, 10-Bit Delta-Sigma ADC 7.8ksps
- USB 2.0 HS Engine with Internal Transceiver
- PDM Interface Supports Two Digital Microphones
- I2S with TDM, Six 32-Bit Timers, Two High-Speed Timers, 1-Wire Master, Sixteen Pulse Train (PWM) Engines
- Secure Digital Interface Supports SD3.0/SDIO3.0/eMMC4.51
- Secure Valuable IP/Data with Hardware Security
- Trust Protection Unit (TPU) with MAA Supports Fast ECDSA and Modular Arithmetic
- AES128/192/256, DES, 3DES, Hardware Accelerator
- TRNG Seed Generator, SHA-2 Accelerator
- Secure Bootloader
Applications/Uses
- Connected Home
- Gaming Devices
- Hearables
- Industrial Sensors
- Payment/Fitness/Medical Wearables
- Telemedicine
Description
DARWIN is a new breed of low-power microcontrollers built to thrive in the rapidly evolving Internet of Things (IoT). They are smart, with the biggest memories in their class and a massively scalable memory architecture. They run forever, thanks to wearable-grade power technology. They are durable enough to withstand the most advanced cyberattacks. DARWIN microcontrollers are designed to run any application imaginable—in places where you would not dream of sending other microcontrollers.
Generation UB microcontrollers are designed to handle the increasingly complex applications demanded by today's advanced battery-powered devices and wirelessly connected devices, while providing robust hardware security and Bluetooth® 5 Low Energy (BLE) radio connectivity.
The MAX32665–MAX32668 UB class microcontrollers are advanced systems-on-chips featuring an Arm® Cortex®-M4 with FPU CPU for efficient computation of complex functions and algorithms with integrated power management. They also include the newest generation Bluetooth 5 Low Energy radio with high throughput (2Mbps) and Maxim's best-in-class hardware security suite trust protection unit (TPU). The devices offer large on-board memory with 1MB flash and up to 560KB SRAM that can be configured as 448KB SRAM with error correction coding (ECC). Split flash banks of 512KB each support seamless over the air upgrades, adding an additional degree of reliability. Memory scalability of data (SRAM) and code (flash) space is supported by two SPI execute-in-place (SPIX) interfaces.
Multiple high-speed interfaces are supported including HS-USB, secure digital interface (SD, SDIO, MMC, SDHC, and microSD™), SPI, UART, and I2C serial interfaces, and an audio subsystem supporting PDM, PCM, I2S, and TDM interfaces. An 8-input, 10-bit ADC is available to monitor analog inputs from external sensors and meters. The devices are available in 109-bump WLP (0.35mm pitch) and 121-bump CTBGA (0.65mm pitch).
Technical Docs
| Data Sheet | Low-Power ARM Cortex-M4 with FPU-Based Microcontroller with Bluetooth 5 for Wearables | Apr 23, 2020 |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact [email protected] with any questions regarding this Sample Site.
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